CHANDLER, Ariz. — Everspin Technologies, Inc, a leading developer and manufacturer of MRAM persistent memory solutions, announced today the successful demonstration of the world’s first Compute Express Link (CXL)-connected MRAM platform at SNIA Developer Conference (SDC) 2026. The demo added a fast persistent memory tier between DRAM and NAND storage that can reduce the time processors and accelerators spend waiting for data and help AI systems run at higher utilization.
The working system connects Everspin PERSYST MRAM to CXL-enabled platforms as persistent memory with memory semantics, combining CXL’s standard high-speed connectivity with MRAM’s ability to retain data without power. It creates a fast persistent buffer and cache tier with cache-line-level, nanosecond-class access and writes up to 100x faster than NAND-based solid-state storage. Data remains available through a power interruption or system restart without relying on battery-backed DRAM or having to first flush data to an SSD.
The demo uses a Supermicro AS-1116CS-TN server with an AMD EPYC 9355 32-core processor, an AMD Alveo U250 FPGA platform with a Wolley CXL controller and Everspin PERSYST 1GB DDR4 MRAM UDIMMs. The configuration provides an open standards-based platform for demonstrating coherent access to persistent MRAM through CXL. It also enables memory resources to be pooled and shared across hosts, allowing persistent memory capacity to be allocated where workloads need it. For AI systems, that creates opportunities for applications such as checkpointing and persistent key-value (KV) cache.
“Everspin has been working with data center customers for 15 years, and we continue to innovate as AI changes the memory needs of systems,” said Sanjeev Aggarwal, president and CEO of Everspin Technologies. “CXL gives us a standard way to bring persistent MRAM to a much broader range of compute platforms. We now have a working system so customers can run their own workloads and measure the benefit for their specific applications.”
At SDC, Everspin and Wolley demonstrated read and write access to MRAM through the CXL interface under demanding test conditions.
“Wolley enables memory and storage connectivity through CXL, and this demonstration with Everspin shows how persistent MRAM can be brought into that environment with memory semantics,” said Dr. Bernard Shung, CEO of Wolley. “Together, we are demonstrating a practical way to connect persistent memory through CXL and make it available to today’s compute platforms.”
The SDC demonstration builds on Everspin’s work to extend MRAM into new memory architectures, including persistent caching, write buffering and metadata applications. To learn more about Everspin MRAM for data center applications, visit the Everspin Data Centers page.
