TORRANCE, CA – Navitas Semiconductor, an industry leader in GaNFast™ gallium nitride (GaN) and GeneSiC™ silicon carbide (SiC) power semiconductors, today announced the launch of its 5th-generation GeneSiC technology platform. The High Voltage (HV) SiC Trench-Assisted Planar (TAP) MOSFET technology represents a significant technological leap over previous generations and will deliver an industry leading 1200V line of MOSFETs. It complements Navitas’ ultra-high voltage (UHV) 2300 V and 3300 V technologies from the 4th generation GeneSiC platform, extending Navitas’ lead in AI data centers, grid and energy infrastructure, and industrial electrification.
The 5th generation MOSFET platform features Navitas’ most compact TAP architecture yet, combining the ruggedness of a planar gate with best-in-class performance figures of merit enabled by a trench structure in the source region while also elevating the efficiency and life-time reliability for high-voltage power electronics.
The 5th generation platform achieves a new benchmark in power conversion through a 35% improved RDS,ON × QGD figure of merit (FoM), as compared to the previous generation 1200 V technology. This improvement significantly slashes switching losses, allowing for cooler operation and higher frequency of operation in demanding power stages.
High-speed switching is further fortified by ~25% improvement to the QGD / QGS ratio. When paired with a stable high threshold voltage specification (VGS,TH ≥ 3V), this technology ensures immunity against parasitic turn-on, providing a robust and predictable gate drive even in high-noise environments.
The 5th generation technology delivers significant improvement in dynamic performance by optimizing the RDS(ON) × EOSS characteristic while also integrating a “Soft Body-Diode” technology to further enhance system stability by minimizing electromagnetic interference (EMI) and ensuring smoother commutation during high-speed switching cycles.
AEC-Plus grade qualification of this generation ensures long-term stability and durability for AI data centers, energy and grid infrastructure applications. Key reliability benchmarks include:
- Extended stress testing: 3x longer duration for static high-temperature, high-voltage testing (HTRB, HTGB, and HTGB-R).
- Advanced switching reliability testing: Dynamic reverse bias (DRB) and dynamic gate switching (DGS) to represent stringent fast-switching application mission-profiles
- Industry-leading stability: Lowest VGS,TH shift over extended switching stress periods for stable long-term efficiency
- Extreme gate oxide reliability: Extrapolated gate-oxide failure time exceeding 1 million years at operating VGS at 18V and 175°C.
- Enhanced cosmic ray resilience: Exceptionally low FIT (Failure In Time) rates, ensuring mission-critical reliability in high-altitude and high-uptime environments.
“Our customers are redefining the boundaries of power conversion in AI data centers and energy infrastructure, and Navitas is marching along with them in every step of the way,” said Paul Wheeler, VP & GM of Navitas’ SiC Business Unit. He added, “significant technological improvements in our 5th generation GeneSiC technology underscore Navitas’ commitment to delivering industry-leading performance and reliability in silicon carbide MOSFETs.”
A white paper on Trench-Assisted Planar technology is available for free download from the Navitas website.
Navitas will be announcing new products in this 5th generation technology platform during the coming months. For further information on this technology, please contact your Navitas Representative or write to info@navitassemi.com.
*Navitas uses the term ‘AEC-Plus’ to indicate parts exceeding AEC-Q101 and JEDEC standards for reliability testing based on Navitas test results.
